This module is series of dividers and "phase shifters" for converting a single clock pulse train into an array of frequencies. The incoming clock signal is divided into successive clock signals, each half the frequency (twice the period) of the previous. Three other outputs, each successively shifted by 90$deg; are also provided. While the first stage has outputs for 90° and 270°, the usability of these outputs is dependent entirely on the waveshape of the clock signal, with square being optimal.
A LED can be included for each of the outputs, enough to satisfy anyone with a love of flashing LEDs.
How to use this module:
The purpose of this module is to divide down a system master clock (e.g. a VCLFO) to drive an array of sequencers or other timed events. The different phase outputs are to allow for modules that may trigger from the falling edge of a wave, or to allow for deliberate lagging of an event. It would for example be possible to have two sequencers running from this unit, one at 1/8 of the frequency of the other, their outputs being mixed to give a sequence that changes fundamental pitch each eight notes.
A little on how it works:
The master divider is a fairly simple circuit with a lot of repetition. The circuit consists of several distinct blocks. The first are the input shapers, made from the TL072 and its associated components. These take whatever signal is fed into the module and convert them to signals appropriate for driving the rest of the circuitry. With the values given, the sensitivity is set at around 2 volts, allowing triggering from signals with a +/- 10 volt swing, or with a 0V to +10 volt swing, both of which are common in modulars. The output wave forms of some modules will never fall below the 1.4V level, preventing triggering.
The upper section of the TL072 is used to process the Clock input. The frequency of the clock signal determines the speed of the output pulses. It can be derived from an LFO, sequencer or any similar pulse source. It is best if a square wave is used, or the 90° and 270° outputs of the first stage will be distorted.
The lower section of the TL072 and its associated components form a "gate to trigger converter", generating a narrow positive going pulse when the "Reset" input goes above the 2 volt threshold. This is used to reset the 4024 divider, and sends all "A" outputs HIGH, and "C" outputs LOW.
The exclusive OR gates of IC1 - 4 are wired into identical networks, each which combines a output stage with the one above it to get the four phase outputs.
Timing diagram for the CGS22 V2 master divider
Specs & Downloads
Specs & Downloads
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